Design Verification

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We have the one of the strongest team in DV. Our team can execute verification from scratch of complex SoC’s and IP’s by using latest methodologies such as SV-UVM, UPF and meeting key KPI such as 100% functional and code coverage. We also provide silicon proven VIP for latest IP’s and provide source code and aftersales support to our customers.

  • Advanced IP & SoC Verification
  • SV-UVM Based Constrained – Random Verification
  • Verification Plan, Environment, Test Bench Development
  • Low Power Verification
  • Gate Level simulation
  • Assertion based Formal Verification
  • VIP Development and Integration
  • Palladium, Zebu & Veloce based Validation Silicon validation